Open Access
2014 Groebner Bases Based Verification Solution for SystemVerilog Concurrent Assertions
Ning Zhou, Xinyan Gao, Jinzhao Wu, Jianchao Wei, Dakui Li
J. Appl. Math. 2014(SI11): 1-15 (2014). DOI: 10.1155/2014/194574


We introduce an approach exploiting the power of polynomial ring algebra to perform SystemVerilog assertion verification over digital circuit systems. This method is based on Groebner bases theory and sequential properties checking. We define a constrained subset of SVAs so that an efficient polynomial modeling mechanism for both circuit descriptions and assertions can be applied. We present an algorithm framework based on the algebraic representations using Groebner bases for concurrent SVAs checking. Case studies show that computer algebra can provide canonical symbolic representations for both assertions and circuit designs and can act as a novel solver engine from the viewpoint of symbolic computation.


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Ning Zhou. Xinyan Gao. Jinzhao Wu. Jianchao Wei. Dakui Li. "Groebner Bases Based Verification Solution for SystemVerilog Concurrent Assertions." J. Appl. Math. 2014 (SI11) 1 - 15, 2014.


Published: 2014
First available in Project Euclid: 1 October 2014

zbMATH: 07131394
Digital Object Identifier: 10.1155/2014/194574

Rights: Copyright © 2014 Hindawi

Vol.2014 • No. SI11 • 2014
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