Journal of Applied Mathematics

Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output Voltage

Hongzhi Hu, Shulin Tian, and Qing Guo

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Abstract

This paper deals with the modeling of fault for analog circuits. A two-dimensional (2D) fault model is first proposed based on collaborative analysis of supply current and output voltage. This model is a family of circle loci on the complex plane, and it simplifies greatly the algorithms for test point selection and potential fault simulations, which are primary difficulties in fault diagnosis of analog circuits. Furthermore, in order to reduce the difficulty of fault location, an improved fault model in three-dimensional (3D) complex space is proposed, which achieves a far better fault detection ratio (FDR) against measurement error and parametric tolerance. To address the problem of fault masking in both 2D and 3D fault models, this paper proposes an effective design for testability (DFT) method. By adding redundant bypassing-components in the circuit under test (CUT), this method achieves excellent fault isolation ratio (FIR) in ambiguity group isolation. The efficacy of the proposed model and testing method is validated through experimental results provided in this paper.

Article information

Source
J. Appl. Math., Volume 2015 (2015), Article ID 851837, 9 pages.

Dates
First available in Project Euclid: 15 April 2015

Permanent link to this document
https://projecteuclid.org/euclid.jam/1429105051

Digital Object Identifier
doi:10.1155/2015/851837

Citation

Hu, Hongzhi; Tian, Shulin; Guo, Qing. Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output Voltage. J. Appl. Math. 2015 (2015), Article ID 851837, 9 pages. doi:10.1155/2015/851837. https://projecteuclid.org/euclid.jam/1429105051


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